RM0008
6.2.2
6.2.3
Low-, medium- and high-density reset and clock control (RCC)
External crystal/ceramic resonator (HSE crystal)
The 4 to 16 MHz external oscillator has the advantage of producing a very accurate rate on
the main clock.
The associated hardware configuration is shown in Figure 9 . Refer to the electrical
characteristics section of the datasheet for more details.
The HSERDY flag in the Clock control register (RCC_CR) indicates if the high-speed
external oscillator is stable or not. At startup, the clock is not released until this bit is set by
hardware. An interrupt can be generated if enabled in the Clock interrupt register
The HSE Crystal can be switched on and off using the HSEON bit in the Clock control
HSI clock
The HSI clock signal is generated from an internal 8 MHz RC Oscillator and can be used
directly as a system clock or divided by 2 to be used as PLL input.
The HSI RC oscillator has the advantage of providing a clock source at low cost (no external
components). It also has a faster startup time than the HSE crystal oscillator however, even
with calibration the frequency is less accurate than an external crystal oscillator or ceramic
resonator.
Calibration
RC oscillator frequencies can vary from one chip to another due to manufacturing process
variations, this is why each device is factory calibrated by ST for 1% accuracy at T A =25°C.
After reset, the factory calibration value is loaded in the HSICAL[7:0] bits in the Clock control
If the application is subject to voltage or temperature variations this may affect the RC
oscillator speed. You can trim the HSI frequency in the application using the HSITRIM[4:0]
The HSIRDY flag in the Clock control register (RCC_CR) indicates if the HSI RC is stable or
not. At startup, the HSI RC output clock is not released until this bit is set by hardware.
The HSI RC can be switched on and off using the HSION bit in the Clock control register
The HSI signal can also be used as a backup source (Auxiliary clock) if the HSE crystal
oscillator fails. Refer to Section 6.2.7: Clock security system (CSS) on page 81 .
PLL
The internal PLL can be used to multiply the HSI RC output or HSE crystal output clock
frequency. Refer to Figure 8 and Clock control register (RCC_CR) .
The PLL configuration (selection of HSI oscillator divided by 2 or HSE oscillator for PLL
input clock, and multiplication factor) must be done before enabling the PLL. Once the PLL
enabled, these parameters cannot be changed.
An interrupt can be generated when the PLL is ready if enabled in the Clock interrupt
Doc ID 13902 Rev 9
79/995
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